Number System Conversions

 Subtraction using r's and r-1's complement

 Logic Gates

Introduction to Boolean Functions

Boolean Functions (part 2)

 Introduction to Minterms and Maxterms

Boolean Functions in Sum of Minterms form

Conversion from sum of Minterms to product of Maxterms form

Example to represent function in sum of minterm, product of maxterm form

Simplification of functions using K Maps (part 1)

Simplification of Boolean functions using K-MAPS (Part 2)

Simplification of Boolean functions in SOP and POS

Implementation of Boolean function using NAND gates only

Half Subtractor and full subtractor

Introduction to Decoders | Design of 2x4 Decoder

Excess-3 to BCD code converter 

3x8 Decoder | Decoder Expansion

4x2 Encoder

4 x 2 Priority Encoder

Design of 4x1 Multiplexer

4x1 Multiplexer with Enable Input | 8x1 Multiplexer

Implementation of a Function using Multiplexers

Quadruple 4x1 Multiplexer

1x4 Demultiplexer | Decoder as Demultiplexer

 1x4 Demultiplexer with Enable Input | 1x8 Demux

2-bit Magnitude Comparator for A=B

2-bit magnitude comparator for A greater than B

3-bit and 4-bit Magnitude Comparator for A greater than B

Design of 4 bit binary adder

4-bit by 2-bit Binary Multiplier

BCD to Decimal Decode

Introduction to Sequential Circuits | Flip Flops

Basic SR Flip Flop using NOR Gates | SR Latch

Basic SR Flip Flop using NAND Gates | SR Latch

Comparison between S.R Latch using NOR Gates and NAND Gates

SR Latch Timing Diagrams

Gated SR Latch | Timing diagram

Gate D Latch | Timing diagram

Clocked SR Flip Flop | Timing Diagram

Edge Triggered D Flip Flop

Edge Triggered JK Flip Flop | T Flip Flop

Excitation Tables

Design of a Sequential Circuit

Design of a Sequential Circuit - Part 2

2 bit UP and Down Counter using JK flip flops

2 bit down counter using JK flip flops-part(b)

49:Analysis of Sequential Circuit

 Registers Fundamentals | Shift Registers